One of the challenges that confront the designers of hard disk drives is the matched termination of the transmission line that drives the magneto-resistive head of the hard disk drive. These transmission lines must carry sufficient power to set the magnetic state of the disk surface, and thus must carry large amounts of current. Typical currents are from 10 mA to 60 mA during a steady-state period of driving the head, and 100 mA or more (such as 120 mA) during a boost period of driving the head. In addition, this current must be switched at high frequencies, typically several hundreds of megahertz to several gigahertz, so as to maintain high bit density at the disk surface.
FIGS. 1 and 2 illustrate this situation. FIG. 1 shows drive circuitry 10 for driving a load 11 through a transmission line 12. Drive circuitry 10 is connected to transmission line 12 through a connection 13, which might be composed of a pad or a terminal. In accordance with an input signal 14, drive circuitry 10 drives load 11 through transmission line 12, so as to result in a current IL flowing in the load 11.
FIG. 2 shows current IL at the load 11. As indicated at FIG. 2, the current IL has a positive-going portion and a negative-going portion, corresponding to ONE and ZERO bit states on the surface of the disk. The current IL has a boost portion TBOOST (or boost period) and a steady state portion TSTEADY—STATE (or steady state period). The boost portion is provided so as to achieve a high slew rate from the prior negative-going portion and the positive-going portion, and vice versa. The steady state portion is provided to effect proper magnetization of the surface of the disk.
Because the transmission line 12 has a characteristic impedance Z0, the transmission line 12 stores transmitted current in the form of heat energy. If drive circuitry 10 is not properly terminated, it is possible for the transmission line 12 to release this stored heat energy, in the form of a reflected signal. More specifically, the far-end of the transmission line at load 11 is not matched by load 11 since the load needs large amounts of current. Thus, when the drive signal reaches the far-end of transmission line at load 11, some of the energy will be reflected back to the near-end 13 through the transmission line 12. If drive circuitry 10 is not properly terminated when the reflection wave comes back to the near-end 13, some of the reflection energy will be re-reflected to the far-end again, which will distort the signal at load 11. FIG. 2 shows a re-reflected signal represented by the dashed waveform. Re-reflected signals are disadvantageous since such signals affect the ability to change and maintain a desired magnetization state on the surface of the disk. Indeed, if reflections are sufficiently large, it is possible to erroneously invert the magnetic state, thus resulting in an incorrect magnetization state.
Two types of termination are commonly employed: series termination and parallel termination. FIG. 3A shows an example of series termination. As seen in FIG. 3A, drive circuitry 10 includes a bipolar transistor 15, which drives transmission line 12 through a series-connected termination resistor 16. The value of termination resistor 16 is selected so as to match the impedance Z0 of transmission line 12. In a typical value, the impedance Z0 of transmission line 12 is Z0=50Ω, and thusRT=Z0=50Ω.
The arrangement shown in FIG. 3A has its disadvantages. Primary among these disadvantages is the voltage drop caused by termination resistor 16. Specifically, during the steady state period of operation, there might be 60 mA of current driving load 11. Thus, the voltage drop across termination resistor 16 is V=60 mA×50Ω=3 V. Such a large voltage drop detracts from the ability of the arrangement of FIG. 3A to drive load 11 at high slew rates. At the same time, such a large voltage drop will make the drive voltage at near-end of the transmission line small and slow, which will eventually result in slower rise/fall times for the current at the driven head. Moreover, in portable applications where the available drive voltage is very small, the arrangement of FIG. 3A might not be able to provide sufficient current to effect changes in magnetization. As one example, many mobile applications have only +3/−2 V as supply voltages. A voltage drop as large as 3 V would make the implementation impossible for such mobile applications. As further examples, a 3.5 inch hard disk drive has +5V/−5V supply voltages for desktop/enterprise uses, a 2.5 inch hard disk drive has +5V/−3V supply voltages for laptop/mobile uses, and a 1.8 inch hard disk drive has +3.3V/−2.1V supply voltages for consumer/mobile uses. A voltage drop as large as 3 V would make these implementations difficult or impossible.
To address this disadvantage, series-terminated arrangements often include a current source such as current source 17. The provision of current source 17 ensures that there is sufficient current to drive load 11 through the transmission line, at the cost of added complexity to the drive circuitry 10.
FIG. 3B shows an example of parallel termination of a transmission line. Unlike in series terminated arrangements, a voltage drop across a termination resistor does not occur in parallel termination of a transmission line. However, parallel termination has its own disadvantages. Specifically, as shown in FIG. 3B, drive circuitry 10 is terminated by termination resistor 18 which is arranged in parallel across transmission line 12. As before, the value of termination resistor 18 is chosen so as to match the impedance Z0 of transmission line 12. Switches 19 and 20 are respectively provided for driving current through load 11 during the boost period and the steady state period. A current mirror 21 sets the amount of current flowing during the steady state period. A positive-going cycle commences with the closure of both of switches 19 and 20. Both switches 19, 20 remain closed during the boost period. After the end of the boost period, switch 19 is opened and switch 20 remains closed for the duration of the steady state period.
One disadvantage with parallel termination as shown in FIG. 3B is that the termination resistance effectively changes between the boost period and the steady state period. During the boost period, because switch 19 is closed, the transistors forming current mirror 21 no longer operate in saturation mode. There is therefore some parasitic capacitance, CPARASITIC, which changes the effective termination resistance of drive circuitry 10. This parasitic capacitance is effectively eliminated when switch 19 is opened, since transistors in current mirror 21 thereupon operate in saturation mode. Thus, the effective termination for drive circuitry 10 changes as between the boost period and the steady state period. Such a change in parasitic capacitance actually promotes signal reflections that matched termination is designed to avoid.